As metal insulator semiconductor field effect transistor (MISFET) feature sizes decrease, the gate oxide thickness of the devices also decreases. This decrease is driven in part by the demands of overall device scaling. As gate conductor widths decrease, for example, other device dimensions decrease to maintain the proper device scale, and thus device operation. Another factor driving reduction of the gate oxide thickness is the increased transistor drain current realized from a reduced gate dielectric thickness. The transistor drain current is proportional to the amount of charge induced in the transistor channel region by the voltage applied to the gate conductor. The amount of charge induced by a given voltage drop across the gate dielectric (e.g., the gate oxide) is a factor of the capacitance of the gate dielectric.
The need to achieve increased capacitance has led to the use of materials that have dielectric constants that are greater than the dielectric constant of silicon oxide, which has a k value of about 3.9. Higher k values, for example 20 or more, may be obtained with various transition metal oxides. These high-k materials allow high capacitances to be achieved with relatively thick dielectric layers.
There are, however, device performance problems associated with high-k gate dielectric layers. The increased electric field needed for higher speed adversely affects device performance through hot carrier (HC) injection and trap generation. Traps influence both subthreshold slope and threshold voltage (Vt). High trap density also leads to leakage through Frenkel-Poole tunneling, and it causes bias temperature instability. Given the ever-increasing demand for improved device performance, hot carrier damage is one of the most significant long-term reliability concerns in semiconductor device fabrication today.
A class of high-k dielectrics that has received much attention recently is hafnium-based oxides. Unlike SiO2, wherein chemical bonding is predominately covalent, Hf-based oxides are predominately ionic and therefore exhibit their own host of problems. One such problem is that conventional accelerated stressing experiments used to predict device lifetime have proven unreliable. Commonly measured parameters such as ring oscillator speed, threshold voltage (Vt), linear transconductance (Gm,lin), saturation transconductance (Gm,sat), linear drain current (IDLIN), and saturation drain current (IDSAT) sometimes yield conflicting results. In some cases, conventional methods overestimate device lifetime by several orders of magnitude.
Accordingly, there is a need in semiconductor manufacturing for improved methods for measuring hot carrier degradation and its effect on device lifetime.